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"microvia_drill_out_of_range": "error",
"missing_courtyard": "ignore",
"missing_footprint": "warning",
"net_conflict": "warning",
"npth_inside_courtyard": "ignore",
"padstack": "warning",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_edge_clearance": "warning",
"silk_over_copper": "warning",
"silk_overlap": "warning",
"skew_out_of_range": "error",
"solder_mask_bridge": "error",
"starved_thermal": "error",
"text_height": "warning",
"text_thickness": "warning",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"zones_intersect": "error"
},
"rules": {
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"min_clearance": 0.0,
"min_connection": 0.0,
"min_copper_edge_clearance": 0.5,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.2,
"min_microvia_drill": 0.1,
"min_resolved_spokes": 2,
"min_silk_clearance": 0.0,
"min_text_height": 0.8,
"min_text_thickness": 0.08,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.0,
"min_via_annular_width": 0.1,
"min_via_diameter": 0.5,
"solder_mask_to_copper_clearance": 0.0,
"use_height_for_length_calcs": true
},
"teardrop_options": [
{
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"td_onroundshapesonly": false,
"td_ontrackend": false,
"td_onviapad": true
}
],
"teardrop_parameters": [
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"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
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"td_target_name": "td_round_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
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"td_length_ratio": 0.5,
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"td_on_pad_in_zone": false,
"td_target_name": "td_rect_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
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"td_on_pad_in_zone": false,
"td_target_name": "td_track_end",
"td_width_to_size_filter_ratio": 0.9
}
],
"track_widths": [
0.0
],
"tuning_pattern_settings": {
"diff_pair_defaults": {
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"corner_style": 1,
"max_amplitude": 1.0,
"min_amplitude": 0.2,
"single_sided": false,
"spacing": 1.0
},
"diff_pair_skew_defaults": {
"corner_radius_percentage": 80,
"corner_style": 1,
"max_amplitude": 1.0,
"min_amplitude": 0.2,
"single_sided": false,
"spacing": 0.6
},
"single_track_defaults": {
"corner_radius_percentage": 80,
"corner_style": 1,
"max_amplitude": 1.0,
"min_amplitude": 0.2,
"single_sided": false,
"spacing": 0.6
}
},
"via_dimensions": [
{
"diameter": 0.0,
"drill": 0.0
}
],
"zones_allow_external_fillets": false
},
"ipc2581": {
"dist": "",
"distpn": "",
"internal_id": "",
"mfg": "",
"mpn": ""
},
"layer_presets": [],
"viewports": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"erc": {
"erc_exclusions": [],
"meta": {
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},
"pin_map": [
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],
"rule_severities": {
"bus_definition_conflict": "error",
"bus_entry_needed": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"conflicting_netclasses": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"endpoint_off_grid": "warning",
"extra_units": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"missing_bidi_pin": "warning",
"missing_input_pin": "warning",
"missing_power_pin": "error",
"missing_unit": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"simulation_model_issue": "ignore",
"unannotated": "error",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
"wire_dangling": "error"
}
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
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"version": 1
},
"net_settings": {
"classes": [
{
"bus_width": 12,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.2,
"via_diameter": 0.6,
"via_drill": 0.3,
"wire_width": 6
}
],
"meta": {
"version": 3
},
"net_colors": null,
"netclass_assignments": null,
"netclass_patterns": []
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "",
"plot": "",
"pos_files": "",
"specctra_dsn": "",
"step": "",
"svg": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"annotate_start_num": 0,
"bom_export_filename": "",
"bom_fmt_presets": [],
"bom_fmt_settings": {
"field_delimiter": ",",
"keep_line_breaks": false,
"keep_tabs": false,
"name": "CSV",
"ref_delimiter": ",",
"ref_range_delimiter": "",
"string_delimiter": "\""
},
"bom_presets": [],
"bom_settings": {
"exclude_dnp": false,
"fields_ordered": [
{
"group_by": false,
"label": "Reference",
"name": "Reference",
"show": true
},
{
"group_by": true,
"label": "Value",
"name": "Value",
"show": true
},
{
"group_by": false,
"label": "Datasheet",
"name": "Datasheet",
"show": true
},
{
"group_by": false,
"label": "Footprint",
"name": "Footprint",
"show": true
},
{
"group_by": false,
"label": "Qty",
"name": "${QUANTITY}",
"show": true
},
{
"group_by": true,
"label": "DNP",
"name": "${DNP}",
"show": true
}
],
"filter_string": "",
"group_symbols": true,
"name": "Grouped By Value",
"sort_asc": true,
"sort_field": "Reference"
},
"connection_grid_size": 50.0,
"drawing": {
"dashed_lines_dash_length_ratio": 12.0,
"dashed_lines_gap_length_ratio": 3.0,
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"field_names": [],
"intersheets_ref_own_page": false,
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
"intersheets_ref_show": false,
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"label_size_ratio": 0.375,
"operating_point_overlay_i_precision": 3,
"operating_point_overlay_i_range": "~A",
"operating_point_overlay_v_precision": 3,
"operating_point_overlay_v_range": "~V",
"overbar_offset_ratio": 1.23,
"pin_symbol_size": 25.0,
"text_offset_ratio": 0.15
},
"legacy_lib_dir": "",
"legacy_lib_list": [],
"meta": {
"version": 1
},
"net_format_name": "",
"page_layout_descr_file": "",
"plot_directory": "",
"spice_current_sheet_as_root": false,
"spice_external_command": "spice \"%I\"",
"spice_model_current_sheet_as_root": true,
"spice_save_all_currents": false,
"spice_save_all_dissipations": false,
"spice_save_all_voltages": false,
"subpart_first_id": 65,
"subpart_id_separator": 0
},
"sheets": [
[
"6e04e848-0952-469d-825b-fc7725d0ff67",
"Root"
]
],
"text_variables": {}
}
(kicad_pcb
(version 20240108)
(generator "pcbnew")
(generator_version "8.0")
(general
(thickness 1.6)
(legacy_teardrops no)
)
(paper "A4")
(layers
(0 "F.Cu" signal)
(31 "B.Cu" signal)
(32 "B.Adhes" user "B.Adhesive")
(33 "F.Adhes" user "F.Adhesive")
(34 "B.Paste" user)
(35 "F.Paste" user)
(36 "B.SilkS" user "B.Silkscreen")
(37 "F.SilkS" user "F.Silkscreen")
(38 "B.Mask" user)
(39 "F.Mask" user)
(40 "Dwgs.User" user "User.Drawings")
(41 "Cmts.User" user "User.Comments")
(42 "Eco1.User" user "User.Eco1")
(43 "Eco2.User" user "User.Eco2")
(44 "Edge.Cuts" user)
(45 "Margin" user)
(46 "B.CrtYd" user "B.Courtyard")
(47 "F.CrtYd" user "F.Courtyard")
(48 "B.Fab" user)
(49 "F.Fab" user)
(50 "User.1" user)
(51 "User.2" user)
(52 "User.3" user)
(53 "User.4" user)
(54 "User.5" user)
(55 "User.6" user)
(56 "User.7" user)
(57 "User.8" user)
(58 "User.9" user)
)
(setup
(pad_to_mask_clearance 0)
(allow_soldermask_bridges_in_footprints no)
(pcbplotparams
(layerselection 0x00010fc_ffffffff)
(plot_on_all_layers_selection 0x0000000_00000000)
(disableapertmacros no)
(usegerberextensions no)
(usegerberattributes yes)
(usegerberadvancedattributes yes)
(creategerberjobfile yes)
(dashed_line_dash_ratio 12.000000)
(dashed_line_gap_ratio 3.000000)
(svgprecision 4)
(plotframeref no)
(viasonmask no)
(mode 1)
(useauxorigin no)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15.000000)
(pdf_front_fp_property_popups yes)
(pdf_back_fp_property_popups yes)
(dxfpolygonmode yes)
(dxfimperialunits yes)
(dxfusepcbnewfont yes)
(psnegative no)
(psa4output no)
(plotreference yes)
(plotvalue yes)
(plotfptext yes)
(plotinvisibletext no)
(sketchpadsonfab no)
(subtractmaskfromsilk no)
(outputformat 1)
(mirror no)
(drillshape 1)
(scaleselection 1)
(outputdirectory "")
)
)
(net 0 "")
(net 1 "/VN_0")
(net 2 "/TDO_0")
(net 3 "VREF")
(net 4 "GND")
(net 5 "/TDI_0")
(net 6 "/BT_AUD_IN")
(net 7 "/DAC_OUT2")
(net 8 "VIN")
(net 9 "/BT_AUD_FSYNC")
(net 10 "/MCU_SWCLK")
(net 11 "/DAC_OUT1")
(net 12 "/TMS_0")
(net 13 "/MCU_nRST")
(net 14 "/Zynq nRST")
(net 15 "/SMD_I2C_SCL7")
(net 16 "/SMB_I2C_SDA7")
(net 17 "/VP_0")
(net 18 "/MCU_SWDIO")
(net 19 "/MCU_VDDIO")
(net 20 "/BT_AUD_CLK")
(net 21 "/TCK_0")
(net 22 "/BT_AUD_OUT")
(net 23 "/PS_MIO24_501")
(net 24 "/PS_MIO33_501")
(net 25 "/PS_MIO21_501")
(net 26 "/PS_MIO25_501")
(net 27 "/PS_MIO53_501")
(net 28 "/PS_MIO31_501")
(net 29 "/PS_MIO36_501")
(net 30 "/PS_MIO18_501")
(net 31 "/PS_MIO27_501")
(net 32 "/PS_MIO20_501")
(net 33 "/SMB_I2C_SCL5")
(net 34 "/PS_MIO30_501")
(net 35 "/PS_MIO17_501")
(net 36 "unconnected-(J3-Pin_3-Pad3)")
(net 37 "/PS_MIO52_501")
(net 38 "/PS_MIO34_501")
(net 39 "/PS_MIO35_501")
(net 40 "/PS_MIO23_501")
(net 41 "/PS_MIO39_501")
(net 42 "/PS_MIO26_501")
(net 43 "VCC0_MIO1_501")
(net 44 "/PS_MIO32_501")
(net 45 "/PS_MIO22_501")
(net 46 "/SMB_I2C_SDA5")
(net 47 "/PS_MIO38_501")
(net 48 "/PS_MIO29_501")
(net 49 "/PS_MIO16_501")
(net 50 "/PS_MIO28_501")
(net 51 "/PS_MIO19_501")
(net 52 "/PS_MIO37_501")
(net 53 "/IO_L6P_T0_35")
(net 54 "/IO_L5N_T0_AD9N_35")
(net 55 "/JA_SMB_nINT")
(net 56 "/IO_L17P_T2_AD5P_35")
(net 57 "/IO_L15P_T2_DQS_AD12P_35")
(net 58 "/IO_L3N_T0_DQS_AD1P_35")
(net 59 "/IO_L4P_T0_35")
(net 60 "/SMB_I2C_SCL0")
(net 61 "/IO_0_35")
(net 62 "/SMB_I2C_SDA0")
(net 63 "/IO_L4N_T0_35")
(net 64 "/IO_L16P_T2_35")
(net 65 "/IO_L1P_T0_AD0P_35")
(net 66 "/IO_L16N_T2_35")
(net 67 "/IO_L17N_T2_AD5N_35")
(net 68 "/IO_L1N_T0_AD0N_35")
(net 69 "/IO_L14P_T2_AD4P_SRCC_35")
(net 70 "/IO_L18N_T2_AD13N_35")
(net 71 "/IO_L18P_T2_AD13P_35")
(net 72 "/IO_L3N_T0_DQS_AD1N_35")
(net 73 "/IO_L2P_T0_AD8P_35")
(net 74 "/IO_L6N_T0_VREF_35")
(net 75 "/IO_L5P_T0_AD9P_35")
(net 76 "/IO_L2N_T0_AD8N_35")
(net 77 "VIO_OUT")
(net 78 "/IO_L13P_T2_MRCC_35")
(net 79 "VCC0_35")
(net 80 "/IO_L14N_T2_AD4N_SRCC_35")
(net 81 "/IO_L13N_T2_MRCC_35")
(net 82 "/IO_L15N_T2_DQS_AD12N_35")
(net 83 "/IO_L12N_T1_MRCC_35")
(net 84 "/IO_L21P_T3_DQS_AD14P_35")
(net 85 "/IO_L23N_T3_35")
(net 86 "/IO_L24P_T3_AD15P_35")
(net 87 "/IO_L11P_T1_SRCC_35")
(net 88 "/IO_L19N_T3_VREF_35")
(net 89 "/IO_L8N_T2_AD10N_35")
(net 90 "/IO_L12P_T1_MRCC_35")
(net 91 "/IO_L24N_T3_AD15N_35")
(net 92 "/IO_L21N_T3_DQS_AD14N_35")
(net 93 "/IO_L22N_T3_AD7N_35")
(net 94 "/IO_L9P_T1_DQS_AD3P_35")
(net 95 "/IO_L9N_T1_DQS_AD3N_35")
(net 96 "/IO_L20N_T3_AD6N_35")
(net 97 "/IO_L19P_T3_35")
(net 98 "/IO_L10P_T1_AD11P_35")
(net 99 "/IO_L7N_T1_AD2N_35")
(net 100 "/IO_L10N_T1_AD11N_35")
(net 101 "/IO_L7P_T1_AD2P_35")
(net 102 "/IO_L22P_T3_AD7P_35")
(net 103 "/IO_L8P_T2_AD10P_35")
(net 104 "/IO_L20P_T3_AD6P_35")
(net 105 "/IO_25_35")
(net 106 "/SMB_I2C_SDA1")
(net 107 "/JA_SMB2_nINT")
(net 108 "/IO_L23P_T3_35")
(net 109 "/IO_L11N_T1_SRCC_35")
(net 110 "/SMB_I2C_SCL1")
(net 111 "/IO_L5P_T0_34")
(net 112 "/JB1_SMB_nINT")
(net 113 "/IO_L12P_T1_MRCC_34")
(net 114 "/IO_L3N_T0_DQS_34")
(net 115 "/IO_L12N_T1_MRCC_34")
(net 116 "/IO_L4N_T0_34")
(net 117 "/IO_L11N_T1_SRCC_34")
(net 118 "/IO_L8N_T1_34")
(net 119 "/IO_L10P_T1_34")
(net 120 "/SMB_I2C_SCL2")
(net 121 "/IO_L2P_T0_34")
(net 122 "/IO_L10N_T1_34")
(net 123 "/IO_L7P_T1_34")
(net 124 "/IO_L3P_T0_DQS_PUDC_B_34")
(net 125 "/IO_L4P_T0_34")
(net 126 "/IO_L6N_T0_VREF_34")
(net 127 "/IO_L7N_T1_34")
(net 128 "/IO_L1N_T0_34")
(net 129 "/IO_L2N_T0_34")
(net 130 "/IO_L9N_T1_DQS_34")
(net 131 "/IO_L5N_T0_34")
(net 132 "/SMB_I2C_SDA2")
(net 133 "/IO_L9P_T1_DQS_34")
(net 134 "/IO_L11P_T1_SRCC_34")
(net 135 "/IO_L8P_T1_34")
(net 136 "/IO_L6P_T0_34")
(net 137 "VCC0_34")
(net 138 "/IO_25_34")
(net 139 "/IO_L1P_T0_34")
(net 140 "/IO_L17N_T2_34")
(net 141 "/IO_L13P_T2_MRCC_34")
(net 142 "/SMB_I2C_SDA3")
(net 143 "/IO_L15N_T2_DQS_34")
(net 144 "/IO_L20P_T3_34")
(net 145 "/IO_0_34")
(net 146 "/IO_L13N_T2_MRCC_34")
(net 147 "/IO_L21N_T3_DQS_34")
(net 148 "/IO_L14P_T2_SRCC_34")
(net 149 "/IO_L20N_T3_34")
(net 150 "/IO_L19N_T3_VREF_34")
(net 151 "/IO_L23P_T3_34")
(net 152 "/SMB_I2C_SCL3")
(net 153 "/IO_L19P_T3_34")
(net 154 "/IO_L18N_T2_34")
(net 155 "/IO_L18P_T2_34")
(net 156 "/IO_L16N_T2_34")
(net 157 "/IO_L24P_T3_34")
(net 158 "/IO_L17P_T2_34")
(net 159 "/IO_L15P_T2_DQS_34")
(net 160 "/IO_L16P_T2_34")
(net 161 "/IO_L22P_T3_34")
(net 162 "/IO_L21P_T3_DQS_34")
(net 163 "/JB2_SMB_nINT")
(net 164 "/IO_L24N_T3_34")
(net 165 "/IO_L14N_T2_SRCC_34")
(net 166 "/IO_L22N_T3_34")
(footprint "Connector_PinSocket_1.27mm:PinSocket_2x20_P1.27mm_Vertical"
(layer "F.Cu")
(uuid "1bea967d-33c2-4aac-8811-50231a0f602d")
(at 170.7388 71.5772 -90)
(descr "Through hole straight socket strip, 2x20, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated")
(tags "Through hole socket strip THT 2x20 1.27mm double row")
(property "Reference" "J3"
(at 0.635 -2.135 90)
(layer "F.SilkS")
(uuid "262638a8-094f-43cb-89ca-f98e11eb849b")
(effects
(font
(size 1 1)
(thickness 0.15)
)
)
)
(property "Value" "SFM-120-01-F-D-A"
(at 0.635 26.265 90)
(layer "F.Fab")
(uuid "4cfd74a2-0630-4b32-ae9e-d5a11ab11098")
(effects
(font
(size 1 1)
(thickness 0.15)
)
)
)
(property "Footprint" "Connector_PinSocket_1.27mm:PinSocket_2x20_P1.27mm_Vertical"
(at 0 0 -90)
(unlocked yes)
(layer "F.Fab")
(hide yes)
(uuid "97d2147c-cda2-4fdc-896d-319363f982f3")
(effects
(font
(size 1.27 1.27)
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(uuid "10ddfb05-0f62-4e68-825b-80672515275d")
)
(fp_text user "${REFERENCE}"
(at 0.635 12.065 360)
(layer "F.Fab")
(uuid "44f06ca1-f100-42c6-9dda-ae79de8f8c19")
(effects
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(pad "1" thru_hole rect
(at 0 0 90)
(size 1 1)
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(layers "*.Cu" "*.Mask")
(remove_unused_layers no)
(net 77 "VIO_OUT")
(pinfunction "Pin_1")
(pintype "passive")
(uuid "34440aa7-1e3d-4fd6-a031-d2e2481bbd9c")
)
(pad "2" thru_hole oval
(at 1.27 0 90)
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(layers "*.Cu" "*.Mask")
(remove_unused_layers no)
(net 107 "/JA_SMB2_nINT")
(pinfunction "Pin_2")
(pintype "passive")
(uuid "3515178f-2c50-4635-80b5-e21077b34456")
)
(pad "3" thru_hole oval
(at 0 1.27 90)
(size 1 1)
(drill 0.7)
(layers "*.Cu" "*.Mask")
(remove_unused_layers no)
(net 79 "VCC0_35")
(pinfunction "Pin_3")
(pintype "passive")
(uuid "6b883181-6e6d-4216-9a4b-4f8998da302e")
)
(pad "4" thru_hole oval
(at 1.27 1.27 90)
(size 1 1)
(drill 0.7)
(layers "*.Cu" "*.Mask")
(remove_unused_layers no)
(net 105 "/IO_25_35")
(pinfunction "Pin_4")
(pintype "passive")
(uuid "bc3e1a26-46f4-44cc-ab9c-2f53be1e8e7a")
)
(pad "5" thru_hole oval
(at 0 2.54 90)
(size 1 1)
(drill 0.7)
(layers "*.Cu" "*.Mask")
(remove_unused_layers no)
(net 102 "/IO_L22P_T3_AD7P_35")
(pinfunction "Pin_5")
(pintype "passive")
(uuid "868c31b7-7ccc-4f0b-9546-3003876a0989")
)
(pad "6" thru_hole oval
(at 1.27 2.54 90)
(size 1 1)
(drill 0.7)
(layers "*.Cu" "*.Mask")
(remove_unused_layers no)
(net 91 "/IO_L24N_T3_AD15N_35")
(pinfunction "Pin_6")
(pintype "passive")
(uuid "2277d273-0a2a-469b-ae55-538f6a21c0ae")
)
(pad "7" thru_hole oval
(at 0 3.81 90)
(size 1 1)
(drill 0.7)
(layers "*.Cu" "*.Mask")
(remove_unused_layers no)
(net 93 "/IO_L22N_T3_AD7N_35")
(pinfunction "Pin_7")
(pintype "passive")
(uuid "639ce617-282f-48fd-9efc-6f4cfffccf1f")
)
(pad "8" thru_hole oval
(at 1.27 3.81 90)
(size 1 1)
(drill 0.7)
(layers "*.Cu" "*.Mask")
(remove_unused_layers no)
(net 86 "/IO_L24P_T3_AD15P_35")
(pinfunction "Pin_8")
(pintype "passive")
(uuid "5899ada7-02da-4df1-8c8f-61fdd9222d22")
)
(pad "9" thru_hole oval
(at 0 5.08 90)
(size 1 1)
(drill 0.7)
(layers "*.Cu" "*.Mask")
(remove_unused_layers no)
(net 4 "GND")
(pinfunction "Pin_9")
(pintype "passive")
(uuid "552103c7-0a2c-499d-8cff-20e662bf823f")
)
(pad "10" thru_hole oval
(at 1.27 5.08 90)
(size 1 1)
(drill 0.7)
(layers "*.Cu" "*.Mask")
(remove_unused_layers no)
(net 4 "GND")
(pinfunction "Pin_10")
(pintype "passive")
(uuid "2ca90159-7a18-4bf8-be79-441536034c25")
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(pad "11" thru_hole oval
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(size 1 1)
(drill 0.7)
(layers "*.Cu" "*.Mask")
(remove_unused_layers no)
(net 108 "/IO_L23P_T3_35")
(pinfunction "Pin_11")
(pintype "passive")
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(pad "12" thru_hole oval
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(size 1 1)
(drill 0.7)
(layers "*.Cu" "*.Mask")
(remove_unused_layers no)
(net 88 "/IO_L19N_T3_VREF_35")
(pinfunction "Pin_12")
(pintype "passive")
(uuid "2345024e-5ce8-413a-ba4c-71a273a1b80e")
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(pad "13" thru_hole oval
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(layers "*.Cu" "*.Mask")
(remove_unused_layers no)
(net 85 "/IO_L23N_T3_35")
(pinfunction "Pin_13")
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(uuid "2b554f0c-49e7-41a2-bdd4-e06702037b73")
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(pad "14" thru_hole oval
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(layers "*.Cu" "*.Mask")
(remove_unused_layers no)
(net 97 "/IO_L19P_T3_35")
(pinfunction "Pin_14")
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(layers "*.Cu" "*.Mask")
(remove_unused_layers no)
(net 4 "GND")
(pinfunction "Pin_15")
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)
(pad "16" thru_hole oval
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(size 1 1)
(drill 0.7)
(layers "*.Cu" "*.Mask")
(remove_unused_layers no)
(net 4 "GND")
(pinfunction "Pin_16")
(pintype "passive")
(uuid "4effc8f7-0169-4615-92e0-6c0f00bd15ac")
)
(pad "17" thru_hole oval
(at 0 10.16 90)
(size 1 1)
(drill 0.7)
(layers "*.Cu" "*.Mask")
(remove_unused_layers no)
(net 84 "/IO_L21P_T3_DQS_AD14P_35")
(pinfunction "Pin_17")
(pintype "passive")
(uuid "deec778c-258e-44b4-a20d-1732e9f15103")
)
(pad "18" thru_hole oval
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(size 1 1)
(drill 0.7)
(layers "*.Cu" "*.Mask")
(remove_unused_layers no)
(net 96 "/IO_L20N_T3_AD6N_35")
(pinfunction "Pin_18")
(pintype "passive")
(uuid "0e5d3e95-a9f7-4979-ae05-1cdf24f490dd")
)
(pad "19" thru_hole oval
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(layers "*.Cu" "*.Mask")
(remove_unused_layers no)
(net 92 "/IO_L21N_T3_DQS_AD14N_35")
(pinfunction "Pin_19")
(pintype "passive")
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(net 104 "/IO_L20P_T3_AD6P_35")
(pinfunction "Pin_20")
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(size 1 1)
(drill 0.7)
(layers "*.Cu" "*.Mask")
(remove_unused_layers no)
(net 4 "GND")
(pinfunction "Pin_21")
(pintype "passive")
(uuid "264573c3-3436-46da-ba6d-df1a9b9833d2")
)
(pad "22" thru_hole oval
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(drill 0.7)
(layers "*.Cu" "*.Mask")
(remove_unused_layers no)
(net 4 "GND")
(pinfunction "Pin_22")
(pintype "passive")
(uuid "fd76d2bc-311f-4411-bb50-ef4205028059")
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(drill 0.7)
(layers "*.Cu" "*.Mask")
(remove_unused_layers no)
(net 94 "/IO_L9P_T1_DQS_AD3P_35")
(pinfunction "Pin_23")
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(size 1 1)
(drill 0.7)
(layers "*.Cu" "*.Mask")
(remove_unused_layers no)
(net 100 "/IO_L10N_T1_AD11N_35")
(pinfunction "Pin_24")
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(drill 0.7)
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(remove_unused_layers no)
(net 95 "/IO_L9N_T1_DQS_AD3N_35")
(pinfunction "Pin_25")
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(size 1 1)
(drill 0.7)
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(remove_unused_layers no)
(net 98 "/IO_L10P_T1_AD11P_35")
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(net 103 "/IO_L8P_T2_AD10P_35")
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(remove_unused_layers no)
(net 99 "/IO_L7N_T1_AD2N_35")
(pinfunction "Pin_30")
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(net 89 "/IO_L8N_T2_AD10N_35")
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(net 4 "GND")
(pinfunction "Pin_34")
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(size 1 1)
(drill 0.7)
(layers "*.Cu" "*.Mask")
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(net 87 "/IO_L11P_T1_SRCC_35")
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(net 83 "/IO_L12N_T1_MRCC_35")
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(net 90 "/IO_L12P_T1_MRCC_35")
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(pad "39" thru_hole oval
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(net 110 "/SMB_I2C_SCL1")
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(net 106 "/SMB_I2C_SDA1")
(pinfunction "Pin_40")
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)
(fp_line (start -1.1 -1.2) (end -1.1 1.2) (layer F.SilkS) (width 0.127))
(fp_line (start 1.1 -1.2) (end 1.1 1.2) (layer F.SilkS) (width 0.127))
(fp_circle (center -0.8 0.7) (end -0.7 0.7) (layer F.SilkS) (width 0.127))
(pad 1 smd rect (at -0.75 1.35 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at -0.25 1.35 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at 0.25 1.35 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at 0.75 1.35 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at 0.75 -1.35 270) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad 6 smd rect (at 0.25 -1.35 270) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad 7 smd rect (at -0.25 -1.35 270) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad 8 smd rect (at -0.75 -1.35 270) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
)
(module SC70-5L (layer F.Cu) (tedit 0)
(descr "<b>SC-70 Package</b>")
(fp_text reference SW2 (at -0.47625 0) (layer F.SilkS)
(effects (font (size 0.28956 0.28956) (thickness 0.024384)) (justify left))
)
(fp_text value MC74VHC1G66DFT1G (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.15)))
)
(fp_line (start 1.1 0.5) (end -1.1 0.5) (layer F.Fab) (width 0.2032))
(fp_line (start -1.1 0.5) (end -1.1 -0.5) (layer F.SilkS) (width 0.2032))
(fp_line (start -1.1 -0.5) (end 1.1 -0.5) (layer F.Fab) (width 0.2032))
(fp_line (start 1.1 -0.5) (end 1.1 0.5) (layer F.SilkS) (width 0.2032))
(fp_circle (center -0.65 0.2) (end -0.5 0.2) (layer F.SilkS) (width 0))
(fp_poly (pts (xy 0.5 -0.6) (xy 0.8 -0.6) (xy 0.8 -1.1) (xy 0.5 -1.1)) (layer F.Fab) (width 0))
(fp_poly (pts (xy -0.8 -0.6) (xy -0.5 -0.6) (xy -0.5 -1.1) (xy -0.8 -1.1)) (layer F.Fab) (width 0))
(fp_poly (pts (xy -0.8 1.1) (xy -0.5 1.1) (xy -0.5 0.6) (xy -0.8 0.6)) (layer F.Fab) (width 0))
(fp_poly (pts (xy -0.15 1.1) (xy 0.15 1.1) (xy 0.15 0.6) (xy -0.15 0.6)) (layer F.Fab) (width 0))
(fp_poly (pts (xy 0.5 1.1) (xy 0.8 1.1) (xy 0.8 0.6) (xy 0.5 0.6)) (layer F.Fab) (width 0))
(pad 4 smd rect (at 0.65 -0.85) (size 0.35 0.8) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at -0.65 -0.85) (size 0.35 0.8) (layers F.Cu F.Paste F.Mask))
(pad 1 smd rect (at -0.65 0.85) (size 0.35 0.8) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at 0 0.85) (size 0.35 0.8) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at 0.65 0.85) (size 0.35 0.8) (layers F.Cu F.Paste F.Mask))
)
(module QFN24-4X4 (layer F.Cu) (tedit 0)
(descr "<b>UF Package 24-Lead (4mm × 4mm) Plastic QFN</b><p>\nSource: http://cds.linear.com/docs/Datasheet/5598f.pdf")
(fp_text reference USB1 (at 0 -2.54 -180) (layer F.SilkS)
(effects (font (size 0.57912 0.57912) (thickness 0.046329)) (justify right top))
)
(fp_text value FT240XQ (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.15)) (justify right top))
)
(fp_line (start -1.9 1.9) (end 1.9 1.9) (layer F.Fab) (width 0.2032))
(fp_line (start 1.9 1.9) (end 1.9 -1.9) (layer F.Fab) (width 0.2032))
(fp_line (start 1.9 -1.9) (end -1.9 -1.9) (layer F.Fab) (width 0.2032))
(fp_line (start -1.9 -1.9) (end -1.9 1.9) (layer F.Fab) (width 0.2032))
(fp_circle (center -1.345 -1.345) (end -1.19 -1.345) (layer F.Fab) (width 0))
(fp_poly (pts (xy -1.95 -1.525) (xy -1.525 -1.525) (xy -1.525 -1.975) (xy -1.95 -1.975)) (layer F.SilkS) (width 0))
(fp_poly (pts (xy -1.3 1.3) (xy 1.3 1.3) (xy 1.3 -1.3) (xy -1.3 -1.3)) (layer F.Mask) (width 0))
(fp_poly (pts (xy -0.6 -0.2) (xy -0.2 -0.2) (xy -0.2 -0.6) (xy -0.6 -0.6)) (layer F.Paste) (width 0))
(fp_poly (pts (xy 0.2 -0.2) (xy 0.6 -0.2) (xy 0.6 -0.6) (xy 0.2 -0.6)) (layer F.Paste) (width 0))
(fp_poly (pts (xy -0.6 0.6) (xy -0.2 0.6) (xy -0.2 0.2) (xy -0.6 0.2)) (layer F.Paste) (width 0))
(fp_poly (pts (xy 0.2 0.6) (xy 0.6 0.6) (xy 0.6 0.2) (xy 0.2 0.2)) (layer F.Paste) (width 0))
(pad 1 smd rect (at -1.9 -1.25) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at -1.9 -0.75) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at -1.9 -0.25) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at -1.9 0.25) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at -1.9 0.75) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad 6 smd rect (at -1.9 1.25) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad 7 smd rect (at -1.25 1.9 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad 8 smd rect (at -0.75 1.9 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad 9 smd rect (at -0.25 1.9 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad 10 smd rect (at 0.25 1.9 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad 11 smd rect (at 0.75 1.9 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad 12 smd rect (at 1.25 1.9 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad 13 smd rect (at 1.9 1.25 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad 14 smd rect (at 1.9 0.75 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad 15 smd rect (at 1.9 0.25 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad 16 smd rect (at 1.9 -0.25 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad 17 smd rect (at 1.9 -0.75 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad 18 smd rect (at 1.9 -1.25 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad 19 smd rect (at 1.25 -1.9 270) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad 20 smd rect (at 0.75 -1.9 270) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad 21 smd rect (at 0.25 -1.9 270) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad 22 smd rect (at -0.25 -1.9 270) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad 23 smd rect (at -0.75 -1.9 270) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad 24 smd rect (at -1.25 -1.9 270) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask))
(pad EXP smd rect (at 0 0) (size 1.5 1.5) (layers F.Cu F.Paste F.Mask))
)
(module MICRO-FIDUCIAL (layer F.Cu) (tedit 0)
(fp_text reference FID3 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.15)))
)
(fp_text value FIDUCIALUFIDUCIAL (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.15)))
)
(pad 1 smd circle (at 0 0) (size 0.635 0.635) (layers F.Cu F.Paste F.Mask))
)
(module DFN8-2X3 (layer F.Cu) (tedit 0)
(descr "<b>DCB Package 8-Lead Plastic DFN (2mm × 2mm)</b><p>\nSource: http://www.linear.com/pc/downloadDocument.do?navId=H0,C1,C1003,C1042,C1032,C1063,P26952,D16357")
(fp_text reference AMP1 (at -1.27 0 90) (layer F.SilkS)
(effects (font (size 0.38608 0.38608) (thickness 0.032512)) (justify bottom))
)
(fp_text value TSV912IQ2T (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.15)))
)
(fp_line (start -1.0922 0.9) (end -1.0922 -0.9) (layer F.SilkS) (width 0.2032))
(fp_line (start -1.1 -1.1) (end 1.1 -1.1) (layer F.Fab) (width 0.2032))
(fp_line (start 1.0922 -0.9) (end 1.0922 0.9) (layer F.SilkS) (width 0.2032))
(fp_line (start 1.1 1.1) (end -1.1 1.1) (layer F.Fab) (width 0.2032))
(fp_poly (pts (xy -0.777 0.517) (xy -0.227 0.517) (xy -0.227 0.392) (xy -0.777 0.392)) (layer F.SilkS) (width 0))
(pad EXP smd rect (at 0 0) (size 1.6 0.45) (layers F.Cu F.Paste F.Mask))
(pad 1 smd rect (at -0.75 1.025) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at -0.25 1.025) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at 0.25 1.025) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at 0.75 1.025 180) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at 0.75 -1.025 180) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))
(pad 6 smd rect (at 0.25 -1.025 180) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))
(pad 7 smd rect (at -0.25 -1.025 180) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))
(pad 8 smd rect (at -0.75 -1.025 180) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))
)
(module 0603-RES (layer F.Cu) (tedit 0)
(fp_text reference R9 (at 0 -0.635) (layer F.SilkS)
(effects (font (size 0.38608 0.38608) (thickness 0.032512)) (justify right top))
)
(fp_text value 10K (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.15)) (justify right top))
)
(fp_line (start -1.5 -0.85) (end 1.5 -0.85) (layer Dwgs.User) (width 0.0508))
(fp_line (start 1.5 -0.85) (end 1.5 0.85) (layer Dwgs.User) (width 0.0508))
(fp_line (start 1.5 0.85) (end -1.5 0.85) (layer Dwgs.User) (width 0.0508))
(fp_line (start -1.5 0.85) (end -1.5 -0.85) (layer Dwgs.User) (width 0.0508))
(fp_line (start -0.356 -0.432) (end 0.356 -0.432) (layer F.Fab) (width 0.1016))
(fp_line (start -0.356 0.419) (end 0.356 0.419) (layer F.Fab) (width 0.1016))
(fp_poly (pts (xy -0.8382 0.4699) (xy -0.3381 0.4699) (xy -0.3381 -0.4801) (xy -0.8382 -0.4801)) (layer F.Fab) (width 0))
(fp_poly (pts (xy 0.3302 0.4699) (xy 0.8303 0.4699) (xy 0.8303 -0.4801) (xy 0.3302 -0.4801)) (layer F.Fab) (width 0))
(fp_poly (pts (xy -0.1999 0.3) (xy 0.1999 0.3) (xy 0.1999 -0.3) (xy -0.1999 -0.3)) (layer F.Adhes) (width 0))
(fp_poly (pts (xy -0.2032 0.381) (xy 0.2032 0.381) (xy 0.2032 -0.381) (xy -0.2032 -0.381)) (layer F.SilkS) (width 0))
(pad 1 smd rect (at -0.85 0) (size 1.1 1) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at 0.85 0) (size 1.1 1) (layers F.Cu F.Paste F.Mask))
)
(module 0603-IND (layer F.Cu) (tedit 0)
(fp_text reference L1 (at 0 -0.635) (layer F.SilkS)
(effects (font (size 0.38608 0.38608) (thickness 0.032512)) (justify bottom))
)
(fp_text value FERRITE-BEAD0603-IND (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.15)))
)
(fp_line (start -1.5 -0.85) (end 1.5 -0.85) (layer Dwgs.User) (width 0.0508))
(fp_line (start 1.5 -0.85) (end 1.5 0.85) (layer Dwgs.User) (width 0.0508))
(fp_line (start 1.5 0.85) (end -1.5 0.85) (layer Dwgs.User) (width 0.0508))
(fp_line (start -1.5 0.85) (end -1.5 -0.85) (layer Dwgs.User) (width 0.0508))
(fp_line (start -0.356 -0.432) (end 0.356 -0.432) (layer F.Fab) (width 0.1016))
(fp_line (start -0.356 0.419) (end 0.356 0.419) (layer F.Fab) (width 0.1016))
(fp_line (start 0 -0.0305) (end 0 0.0305) (layer F.SilkS) (width 0.4064))
(fp_poly (pts (xy -0.8382 0.4699) (xy -0.3381 0.4699) (xy -0.3381 -0.4801) (xy -0.8382 -0.4801)) (layer F.Fab) (width 0))
(fp_poly (pts (xy 0.3302 0.4699) (xy 0.8303 0.4699) (xy 0.8303 -0.4801) (xy 0.3302 -0.4801)) (layer F.Fab) (width 0))
(fp_poly (pts (xy -0.1999 0.3) (xy 0.1999 0.3) (xy 0.1999 -0.3) (xy -0.1999 -0.3)) (layer F.Adhes) (width 0))
(pad 1 smd rect (at -0.85 0) (size 1.1 1) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at 0.85 0) (size 1.1 1) (layers F.Cu F.Paste F.Mask))
)
(module 0603-CAP (layer F.Cu) (tedit 0)
(fp_text reference C7 (at 0 -0.635) (layer F.SilkS)
(effects (font (size 0.38608 0.38608) (thickness 0.030886)) (justify left bottom))
)
(fp_text value 10nF (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.15)))
)
(fp_line (start -1.5 -0.85) (end 1.5 -0.85) (layer Dwgs.User) (width 0.0508))
(fp_line (start 1.5 -0.85) (end 1.5 0.85) (layer Dwgs.User) (width 0.0508))
(fp_line (start 1.5 0.85) (end -1.5 0.85) (layer Dwgs.User) (width 0.0508))
(fp_line (start -1.5 0.85) (end -1.5 -0.85) (layer Dwgs.User) (width 0.0508))
(fp_line (start -0.356 -0.432) (end 0.356 -0.432) (layer F.Fab) (width 0.1016))
(fp_line (start -0.356 0.419) (end 0.356 0.419) (layer F.Fab) (width 0.1016))
(fp_line (start 0 -0.0305) (end 0 0.0305) (layer F.SilkS) (width 0.4064))
(fp_poly (pts (xy -0.8382 0.4699) (xy -0.3381 0.4699) (xy -0.3381 -0.4801) (xy -0.8382 -0.4801)) (layer F.Fab) (width 0))
(fp_poly (pts (xy 0.3302 0.4699) (xy 0.8303 0.4699) (xy 0.8303 -0.4801) (xy 0.3302 -0.4801)) (layer F.Fab) (width 0))
(fp_poly (pts (xy -0.1999 0.3) (xy 0.1999 0.3) (xy 0.1999 -0.3) (xy -0.1999 -0.3)) (layer F.Adhes) (width 0))
(pad 1 smd rect (at -0.85 0) (size 1.1 1) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at 0.85 0) (size 1.1 1) (layers F.Cu F.Paste F.Mask))
)
(version 1)
# Custom Design Rules (DRC) for KiCAD 7.0 (Stored in '<project>.kicad_dru' file).
#
# Matching JLCPCB capabilities: https://jlcpcb.com/capabilities/pcb-capabilities
#
# KiCad documentation: https://docs.kicad.org/master/id/pcbnew/pcbnew_advanced.html#custom_design_rules
#
# Inspiration
# - https://gist.github.com/darkxst/f713268e5469645425eed40115fb8b49 (with comments)
# - https://gist.github.com/denniskupec/e163d13b0a64c2044bd259f64659485e (with comments)
# TODO new rule: NPTH pads.
# Inner diameter of pad should be 0.4-0.5 mm larger than NPTH drill diameter.
# JLCPCB: "We make NPTH via dry sealing film process, if customer would like a NPTH but around with pad/copper, our engineer will dig out around pad/copper about 0.2mm-0.25mm, otherwise the metal potion will be flowed into the hole and it becomes a PTH. (there will be no copper dig out optimization for single board)."
# TODO: new rule for plated slots: min diameter/width 0.5mm
# JLCPCB: "The minimum plated slot width is 0.5mm, which is drawn with a pad."
# TODO new rule: non-plated slots: min diameter/width 1.0mm
# JLCPCB: "The minimum Non-Plated Slot Width is 1.0mm, please draw the slot outline in the mechanical layer(GML or GKO)""
(rule "Track width, outer layer (1oz copper)"
(layer outer)
(condition "A.Type == 'track'")
(constraint track_width (min 0.127mm))
)
(rule "Track spacing, outer layer (1oz copper)"
(layer outer)
(condition "A.Type == 'track' && B.Type == A.Type")
(constraint clearance (min 0.127mm))
)
(rule "Track width, inner layer"
(layer inner)
(condition "A.Type == 'track'")
(constraint track_width (min 0.09mm))
)
(rule "Track spacing, inner layer"
(layer inner)
(condition "A.Type == 'track' && B.Type == A.Type")
(constraint clearance (min 0.09mm))
)
(rule "Silkscreen text"
(layer "?.Silkscreen")
(condition "A.Type == 'Text' || A.Type == 'Text Box'")
(constraint text_thickness (min 0.15mm))
(constraint text_height (min 1mm))
)
(rule "Pad to Silkscreen"
(layer outer)
(condition "A.Type == 'pad' && B.Layer == '?.Silkscreen'")
(constraint silk_clearance (min 0.15mm))
)
(rule "Edge (routed) to track clearance"
(condition "A.Type == 'track'")
(constraint edge_clearance (min 0.3mm))
)
#(rule "Edge (v-cut) to track clearance"
# (condition "A.Type == 'track'")
# (constraint edge_clearance (min 0.4mm))
#)
# JLCPCB restrictions ambiguous:
# Illustration: 0.2 mm, 1&2 layer: 0.3 mm, multilayer: "(0.15mm more costly)"
# This rule handles diameter minimum and maximum for ALL holes.
# Other specialized rules handle restrictions (e.g. Via, PTH, NPTH)
(rule "Hole diameter"
(constraint hole_size (min 0.2mm) (max 6.3mm))
)
(rule "Hole (NPTH) diameter"
(layer outer)
(condition "!A.isPlated()")
(constraint hole_size (min 0.5mm))
)
# TODO: Hole to board edge ≥ 1 mm. Min. board size 10 × 10 mm
(rule "Hole (castellated) diameter"
(layer outer)
(condition "A.Type == 'pad' && A.Fabrication_Property == 'Castellated pad'")
(constraint hole_size (min 0.6mm))
)
# JLCPCB: "Via diameter should be 0.1mm(0.15mm preferred) larger than Via hole size" (illustration shows diameters for both dimensions)
# JLCPCB: PTH: "The annular ring size will be enlarged to 0.15mm in production."
(rule "Annular ring width (via and PTH)"
(layer outer)
(condition "A.isPlated()")
(constraint annular_width (min 0.075mm))
)
(rule "Clearance: hole to hole (perimeter), different nets"
(layer outer)
(condition "A.Net != B.Net")
(constraint hole_to_hole (min 0.5mm))
)
(rule "Clearance: hole to hole (perimeter), same net"
(layer outer)
(condition "A.Net == B.Net")
(constraint hole_to_hole (min 0.254mm))
)
(rule "Clearance: track to NPTH hole (perimeter)"
# (condition "A.Pad_Type == 'NPTH, mechanical' && B.Type == 'track' && A.Net != B.Net")
(condition "!A.isPlated() && B.Type == 'track' && A.Net != B.Net")
(constraint hole_clearance (min 0.254mm))
)
(rule "Clearance: track to PTH hole perimeter"
(condition "A.isPlated() && B.Type == 'track' && A.Net != B.Net")
(constraint hole_clearance (min 0.33mm))
)
# TODO: try combining with rule "Clearance: PTH to track, different nets"
(rule "Clearance: track to pad"
(condition "A.Type == 'pad' && B.Type == 'track' && A.Net != B.Net")
(constraint clearance (min 0.2mm))
)
(rule "Clearance: pad/via to pad/via"
(layer outer)
# (condition "(A.Type == 'Pad' || A.Type == 'Via') && (B.Type == 'Pad' || B.Type == 'Via') && A.Net != B.Net")
(condition "A.isPlated() && B.isPlated() && A.Net != B.Net")
(constraint clearance (min 0.127mm))
)
EESchema-DOCLIB Version 2.0
#
#End Doc Library
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# infnoise_goldfingers-eagle-import:CAP0603-CAP
#
DEF infnoise_goldfingers-eagle-import:CAP0603-CAP C 0 40 Y Y 1 F N
F0 "C" 60 115 59 H V L BNN
F1 "infnoise_goldfingers-eagle-import:CAP0603-CAP" 60 -85 59 H V L BNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
S -80 20 80 40 1 0 0 F
S -80 60 80 80 1 0 0 F
P 2 1 0 0 0 0 0 20 N
P 2 1 0 0 0 100 0 80 N
X 1 1 0 200 100 D 0 0 1 0 P
X 2 2 0 -100 100 U 0 0 1 0 P
ENDDRAW
ENDDEF
#
# infnoise_goldfingers-eagle-import:FERRITE-BEAD0603-IND
#
DEF infnoise_goldfingers-eagle-import:FERRITE-BEAD0603-IND L 0 40 Y Y 1 F N
F0 "L" -150 54 59 H V L BNN
F1 "infnoise_goldfingers-eagle-import:FERRITE-BEAD0603-IND" -150 -115 59 H V L BNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
S -100 -35 100 35 1 0 0 F
X 1 1 -200 0 100 R 0 0 1 0 P
X 2 2 200 0 100 L 0 0 1 0 P
ENDDRAW
ENDDEF
#
# infnoise_goldfingers-eagle-import:FIDUCIALUFIDUCIAL
#
DEF ~infnoise_goldfingers-eagle-import:FIDUCIALUFIDUCIAL FID 0 40 Y Y 1 F N
F0 "FID" 0 0 50 H I C CNN
F1 "infnoise_goldfingers-eagle-import:FIDUCIALUFIDUCIAL" 0 0 50 H I C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
C 0 0 50 1 0 10 N
P 2 1 0 0 -30 30 30 -30 N
P 2 1 0 0 30 30 -30 -30 N
ENDDRAW
ENDDEF
#
# infnoise_goldfingers-eagle-import:FT240XQ
#
DEF infnoise_goldfingers-eagle-import:FT240XQ USB 0 40 Y Y 1 F N
F0 "USB" -300 300 59 H V L BNN
F1 "infnoise_goldfingers-eagle-import:FT240XQ" -300 0 59 H V L BNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 1 0 0 -900 -900 -900 900 N
P 2 1 0 0 -900 900 900 900 N
P 2 1 0 0 900 -900 -900 -900 N
P 2 1 0 0 900 900 900 -900 N
X D1 1 -1100 500 200 R 50 50 1 0 U
X USBDP 10 100 -1100 200 U 50 50 1 0 U
X USBDM 11 300 -1100 200 U 50 50 1 0 U
X 3V3OUT 12 500 -1100 200 U 50 50 1 0 U
X RESET# 13 1100 -500 200 L 50 50 1 0 U
X VCORE 14 1100 -300 200 L 50 50 1 0 U
X VCC 15 1100 -100 200 L 50 50 1 0 U
X GND 16 -1100 100 200 R 0 50 1 0 U
X TXE# 17 1100 300 200 L 50 50 1 0 U
X RXF# 18 1100 500 200 L 50 50 1 0 U
X CBUS6 19 500 1100 200 D 50 50 1 0 U
X D7 2 -1100 300 200 R 50 50 1 0 U
X CBUS5 20 300 1100 200 D 50 50 1 0 U
X D0 21 100 1100 200 D 50 50 1 0 U
X D4 22 -100 1100 200 D 50 50 1 0 U
X D2 23 -300 1100 200 D 50 50 1 0 U
X VCCIO 24 -500 1100 200 D 50 50 1 0 U
X GND 3 -1100 100 200 R 0 50 1 0 U
X D5 4 -1100 -100 200 R 50 50 1 0 U
X D6 5 -1100 -300 200 R 50 50 1 0 U
X D3 6 -1100 -500 200 R 50 50 1 0 U
X SI/WU# 7 -500 -1100 200 U 50 50 1 0 U
X RD# 8 -300 -1100 200 U 50 50 1 0 U
X WR# 9 -100 -1100 200 U 50 50 1 0 U
X GND EXP -1100 100 200 R 0 50 1 0 U
ENDDRAW
ENDDEF
#
# infnoise_goldfingers-eagle-import:GND
#
DEF infnoise_goldfingers-eagle-import:GND SUPPLY 0 40 Y Y 1 F P
F0 "SUPPLY" 0 0 50 H I C CNN
F1 "infnoise_goldfingers-eagle-import:GND" -75 -125 59 H V L BNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 1 0 0 -50 0 50 0 N
P 2 1 0 0 0 -50 -50 0 N
P 2 1 0 0 50 0 0 -50 N
X GND 1 0 100 100 D 0 0 1 0 W
ENDDRAW
ENDDEF
#
# infnoise_goldfingers-eagle-import:MC74VHC1G66DFT1G
#
DEF ~infnoise_goldfingers-eagle-import:MC74VHC1G66DFT1G SW 0 40 Y Y 1 F N
F0 "SW" 0 0 50 H I C CNN
F1 "infnoise_goldfingers-eagle-import:MC74VHC1G66DFT1G" 0 0 50 H I C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
C 100 15 15 1 0 10 N
P 2 1 0 0 -100 0 50 150 N
X COM 1 -300 0 200 R 50 0 1 0 U
X NO 2 300 0 200 L 50 0 1 0 U
X GND 3 200 -400 100 U 50 50 1 0 U
X IN 4 0 400 200 D 50 0 1 0 U
X VCC 5 200 400 100 D 50 50 1 0 U
ENDDRAW
ENDDEF
#
# infnoise_goldfingers-eagle-import:RESISTOR0603-RES
#
DEF infnoise_goldfingers-eagle-import:RESISTOR0603-RES R 0 40 Y Y 1 F N
F0 "R" -150 59 59 H V L BNN
F1 "infnoise_goldfingers-eagle-import:RESISTOR0603-RES" -150 -130 59 H V L BNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 1 0 0 -100 0 -85 40 N
P 2 1 0 0 -85 40 -60 -40 N
P 2 1 0 0 -60 -40 -35 40 N
P 2 1 0 0 -35 40 -10 -40 N
P 2 1 0 0 -10 -40 15 40 N
P 2 1 0 0 15 40 40 -40 N
P 2 1 0 0 40 -40 65 40 N
P 2 1 0 0 65 40 90 -40 N
P 2 1 0 0 90 -40 100 0 N
X 1 1 -200 0 100 R 0 0 1 0 P
X 2 2 200 0 100 L 0 0 1 0 P
ENDDRAW
ENDDEF
#
# infnoise_goldfingers-eagle-import:TC75W57FK
#
DEF infnoise_goldfingers-eagle-import:TC75W57FK COMP 0 40 Y Y 1 F N
F0 "COMP" -200 700 59 H V L BNN
F1 "infnoise_goldfingers-eagle-import:TC75W57FK" -200 -500 59 H V L BNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 1 0 0 -800 -400 -800 0 N
P 2 1 0 0 -800 0 -800 200 N
P 2 1 0 0 -800 0 -500 0 N
P 2 1 0 0 -800 200 -800 400 N
P 2 1 0 0 -800 200 -500 200 N
P 2 1 0 0 -800 400 -800 600 N
P 2 1 0 0 -800 600 900 600 N
P 2 1 0 0 -100 100 0 100 N
P 2 1 0 0 0 100 0 400 N
P 2 1 0 0 0 400 -800 400 N
P 2 1 0 0 100 -100 100 200 N
P 2 1 0 0 100 200 900 200 N
P 2 1 0 0 200 -100 100 -100 N
P 2 1 0 0 900 -400 -800 -400 N
P 2 1 0 0 900 -200 600 -200 N
P 2 1 0 0 900 -200 900 -400 N
P 2 1 0 0 900 0 600 0 N
P 2 1 0 0 900 0 900 -200 N
P 2 1 0 0 900 200 900 0 N
P 2 1 0 0 900 600 900 200 N
P 3 1 0 0 -500 300 -500 -100 -100 100 F
P 3 1 0 0 600 -300 600 100 200 -100 F
X OUT1 1 -1000 400 200 R 50 50 1 0 U
X IN1- 2 -1000 200 200 R 50 50 1 0 U
X IN1+ 3 -1000 0 200 R 50 50 1 0 U
X VSS 4 -1000 -200 200 R 50 50 1 0 U
X IN2+ 5 1100 -200 200 L 50 50 1 0 U
X IN2- 6 1100 0 200 L 50 50 1 0 U
X OUT2 7 1100 200 200 L 50 50 1 0 U
X VDD 8 1100 400 200 L 50 50 1 0 U
ENDDRAW
ENDDEF
#
# infnoise_goldfingers-eagle-import:TSV912IQ2T
#
DEF infnoise_goldfingers-eagle-import:TSV912IQ2T AMP 0 40 Y Y 1 F N
F0 "AMP" -300 700 59 H V L BNN
F1 "infnoise_goldfingers-eagle-import:TSV912IQ2T" -300 -500 59 H V L BNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 1 0 0 -800 -400 -800 0 N
P 2 1 0 0 -800 0 -800 200 N
P 2 1 0 0 -800 0 -500 0 N
P 2 1 0 0 -800 200 -800 400 N
P 2 1 0 0 -800 200 -500 200 N
P 2 1 0 0 -800 400 -800 600 N
P 2 1 0 0 -800 600 900 600 N
P 2 1 0 0 -100 100 0 100 N
P 2 1 0 0 0 100 0 400 N
P 2 1 0 0 0 400 -800 400 N
P 2 1 0 0 100 -100 100 200 N
P 2 1 0 0 100 200 900 200 N
P 2 1 0 0 200 -100 100 -100 N
P 2 1 0 0 900 -400 -800 -400 N
P 2 1 0 0 900 -200 600 -200 N
P 2 1 0 0 900 -200 900 -400 N
P 2 1 0 0 900 0 600 0 N
P 2 1 0 0 900 0 900 -200 N
P 2 1 0 0 900 200 900 0 N
P 2 1 0 0 900 600 900 200 N
P 3 1 0 0 -500 300 -500 -100 -100 100 F
P 3 1 0 0 600 -300 600 100 200 -100 F
X OUT1 1 -1000 400 200 R 50 50 1 0 U
X IN1- 2 -1000 200 200 R 50 50 1 0 U
X IN1+ 3 -1000 0 200 R 50 50 1 0 U
X GND 4 -1000 -200 200 R 0 50 1 0 U
X IN2+ 5 1100 -200 200 L 50 50 1 0 U
X IN2- 6 1100 0 200 L 50 50 1 0 U
X OUT2 7 1100 200 200 L 50 50 1 0 U
X VCC 8 1100 400 200 L 50 50 1 0 U
X GND EXP -1000 -200 200 R 0 50 1 0 U
ENDDRAW
ENDDEF
#
# infnoise_goldfingers-eagle-import:USBRAWPINS
#
DEF ~infnoise_goldfingers-eagle-import:USBRAWPINS X 0 40 Y Y 1 F N
F0 "X" 0 0 50 H I C CNN
F1 "infnoise_goldfingers-eagle-import:USBRAWPINS" 0 0 50 H I C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
T 900 150 0 85 0 1 0 USB Normal 0 L B
P 2 1 0 0 0 -50 200 -50 N
P 2 1 0 0 0 350 0 -50 N
P 2 1 0 0 200 350 0 350 N
X VCC 5V -100 300 100 R 50 0 1 0 U
X GND GND -100 0 100 R 50 0 1 0 U
X D- USB_M -100 200 100 R 50 0 1 0 U
X D+ USB_P -100 100 100 R 50 0 1 0 U
ENDDRAW
ENDDEF
#
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