# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py

# RUN: llc -mtriple aarch64 -run-pass=aarch64-prelegalizer-combiner --aarch64prelegalizercombinerhelper-only-enable-rule="and_or_disjoint_mask" -global-isel -verify-machineinstrs %s -o - | FileCheck %s
# REQUIRES: asserts

...
---
name:            disjoint_masks
tracksRegLiveness: true
machineFunctionInfo: {}
body:             |
  bb.0:
    liveins: $w0
    ; CHECK-LABEL: name: disjoint_masks
    ; CHECK: liveins: $w0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %x:_(s32) = COPY $w0
    ; CHECK-NEXT: %two:_(s32) = G_CONSTANT i32 2
    ; CHECK-NEXT: %and:_(s32) = G_AND %x, %two
    ; CHECK-NEXT: $w0 = COPY %and(s32)
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %x:_(s32) = COPY $w0
    %one:_(s32) = G_CONSTANT i32 1
    %two:_(s32) = G_CONSTANT i32 2
    %or:_(s32) = G_OR %x, %one
    %and:_(s32) = G_AND %or, %two
    $w0 = COPY %and(s32)
    RET_ReallyLR implicit $w0
...
---
name:            disjoint_masks_rev
tracksRegLiveness: true
machineFunctionInfo: {}
body:             |
  bb.0:
    liveins: $w0
    ; CHECK-LABEL: name: disjoint_masks_rev
    ; CHECK: liveins: $w0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %x:_(s32) = COPY $w0
    ; CHECK-NEXT: %two:_(s32) = G_CONSTANT i32 2
    ; CHECK-NEXT: %and:_(s32) = G_AND %x, %two
    ; CHECK-NEXT: $w0 = COPY %and(s32)
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %x:_(s32) = COPY $w0
    %one:_(s32) = G_CONSTANT i32 1
    %two:_(s32) = G_CONSTANT i32 2
    %or:_(s32) = G_OR %x, %one
    %and:_(s32) = G_AND %two, %or
    $w0 = COPY %and(s32)
    RET_ReallyLR implicit $w0
...
---
name:            intersecting_masks
tracksRegLiveness: true
machineFunctionInfo: {}
body:             |
  bb.0:
    liveins: $w0
    ; CHECK-LABEL: name: intersecting_masks
    ; CHECK: liveins: $w0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %x:_(s32) = COPY $w0
    ; CHECK-NEXT: %one:_(s32) = G_CONSTANT i32 3
    ; CHECK-NEXT: %two:_(s32) = G_CONSTANT i32 2
    ; CHECK-NEXT: %or:_(s32) = G_OR %x, %one
    ; CHECK-NEXT: %and:_(s32) = G_AND %or, %two
    ; CHECK-NEXT: $w0 = COPY %and(s32)
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %x:_(s32) = COPY $w0
    %one:_(s32) = G_CONSTANT i32 3
    %two:_(s32) = G_CONSTANT i32 2
    %or:_(s32) = G_OR %x, %one
    %and:_(s32) = G_AND %or, %two
    $w0 = COPY %and(s32)
    RET_ReallyLR implicit $w0
...
---
name:            intersecting_masks_rev
tracksRegLiveness: true
machineFunctionInfo: {}
body:             |
  bb.0:
    liveins: $w0
    ; CHECK-LABEL: name: intersecting_masks_rev
    ; CHECK: liveins: $w0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %x:_(s32) = COPY $w0
    ; CHECK-NEXT: %one:_(s32) = G_CONSTANT i32 3
    ; CHECK-NEXT: %two:_(s32) = G_CONSTANT i32 2
    ; CHECK-NEXT: %or:_(s32) = G_OR %x, %one
    ; CHECK-NEXT: %and:_(s32) = G_AND %two, %or
    ; CHECK-NEXT: $w0 = COPY %and(s32)
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %x:_(s32) = COPY $w0
    %one:_(s32) = G_CONSTANT i32 3
    %two:_(s32) = G_CONSTANT i32 2
    %or:_(s32) = G_OR %x, %one
    %and:_(s32) = G_AND %two, %or
    $w0 = COPY %and(s32)
    RET_ReallyLR implicit $w0
...
---
name:            disjoint_masks_v
tracksRegLiveness: true
machineFunctionInfo: {}
body:             |
  bb.0:
    liveins: $x0
    ; CHECK-LABEL: name: disjoint_masks_v
    ; CHECK: liveins: $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %x:_(<2 x s32>) = COPY $x0
    ; CHECK-NEXT: %one:_(s32) = G_CONSTANT i32 1
    ; CHECK-NEXT: %one_v:_(<2 x s32>) = G_DUP %one(s32)
    ; CHECK-NEXT: %two:_(s32) = G_CONSTANT i32 2
    ; CHECK-NEXT: %two_v:_(<2 x s32>) = G_DUP %two(s32)
    ; CHECK-NEXT: %or:_(<2 x s32>) = G_OR %x, %one_v
    ; CHECK-NEXT: %and:_(<2 x s32>) = G_AND %or, %two_v
    ; CHECK-NEXT: $x0 = COPY %and(<2 x s32>)
    ; CHECK-NEXT: RET_ReallyLR implicit $x0
    %x:_(<2 x s32>) = COPY $x0
    %one:_(s32) = G_CONSTANT i32 1
    %one_v:_(<2 x s32>) = G_DUP %one
    %two:_(s32) = G_CONSTANT i32 2
    %two_v:_(<2 x s32>) = G_DUP %two
    %or:_(<2 x s32>) = G_OR %x, %one_v
    %and:_(<2 x s32>) = G_AND %or, %two_v
    $x0 = COPY %and(<2 x s32>)
    RET_ReallyLR implicit $x0
...