# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -O0 -mtriple thumb-- -mattr=+v6t2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --- | define void @test_select_s32() { ret void } define void @test_select_ptr() { ret void } ... --- name: test_select_s32 legalized: true regBankSelected: true selected: false registers: - { id: 0, class: gprb } - { id: 1, class: gprb } - { id: 2, class: gprb } - { id: 3, class: gprb } body: | bb.0: liveins: $r0, $r1 ; CHECK-LABEL: name: test_select_s32 ; CHECK: [[COPY:%[0-9]+]]:rgpr = COPY $r0 ; CHECK: [[COPY1:%[0-9]+]]:rgpr = COPY $r1 ; CHECK: t2TSTri [[COPY1]], 1, 14 /* CC::al */, $noreg, implicit-def $cpsr ; CHECK: [[t2MOVCCr:%[0-9]+]]:rgpr = t2MOVCCr [[COPY]], [[COPY1]], 0 /* CC::eq */, $cpsr ; CHECK: $r0 = COPY [[t2MOVCCr]] ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 %0(s32) = COPY $r0 %1(s32) = COPY $r1 %2(s1) = G_TRUNC %1(s32) %3(s32) = G_SELECT %2(s1), %0, %1 $r0 = COPY %3(s32) BX_RET 14, $noreg, implicit $r0 ... --- name: test_select_ptr legalized: true regBankSelected: true selected: false registers: - { id: 0, class: gprb } - { id: 1, class: gprb } - { id: 2, class: gprb } - { id: 3, class: gprb } - { id: 4, class: gprb } body: | bb.0: liveins: $r0, $r1, $r2 ; CHECK-LABEL: name: test_select_ptr ; CHECK: [[COPY:%[0-9]+]]:rgpr = COPY $r0 ; CHECK: [[COPY1:%[0-9]+]]:rgpr = COPY $r1 ; CHECK: [[COPY2:%[0-9]+]]:gpr = COPY $r2 ; CHECK: [[COPY3:%[0-9]+]]:rgpr = COPY [[COPY2]] ; CHECK: t2TSTri [[COPY3]], 1, 14 /* CC::al */, $noreg, implicit-def $cpsr ; CHECK: [[t2MOVCCr:%[0-9]+]]:rgpr = t2MOVCCr [[COPY]], [[COPY1]], 0 /* CC::eq */, $cpsr ; CHECK: $r0 = COPY [[t2MOVCCr]] ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 %0(p0) = COPY $r0 %1(p0) = COPY $r1 %2(s32) = COPY $r2 %3(s1) = G_TRUNC %2(s32) %4(p0) = G_SELECT %3(s1), %0, %1 $r0 = COPY %4(p0) BX_RET 14, $noreg, implicit $r0 ...