# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc %s -verify-machineinstrs -mtriple=aarch64-unknown-unknown -run-pass=instruction-select -mattr=+fullfp16 -o - | FileCheck %s ... --- name: test_f64.intrinsic_trunc alignment: 4 legalized: true regBankSelected: true tracksRegLiveness: true machineFunctionInfo: {} body: | bb.0: liveins: $d0 ; CHECK-LABEL: name: test_f64.intrinsic_trunc ; CHECK: liveins: $d0 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0 ; CHECK: [[FRINTZDr:%[0-9]+]]:fpr64 = nofpexcept FRINTZDr [[COPY]] ; CHECK: $d0 = COPY [[FRINTZDr]] ; CHECK: RET_ReallyLR implicit $d0 %0:fpr(s64) = COPY $d0 %1:fpr(s64) = G_INTRINSIC_TRUNC %0 $d0 = COPY %1(s64) RET_ReallyLR implicit $d0 ... --- name: test_f32.intrinsic_trunc alignment: 4 legalized: true regBankSelected: true tracksRegLiveness: true machineFunctionInfo: {} body: | bb.0: liveins: $s0 ; CHECK-LABEL: name: test_f32.intrinsic_trunc ; CHECK: liveins: $s0 ; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0 ; CHECK: [[FRINTZSr:%[0-9]+]]:fpr32 = nofpexcept FRINTZSr [[COPY]] ; CHECK: $s0 = COPY [[FRINTZSr]] ; CHECK: RET_ReallyLR implicit $s0 %0:fpr(s32) = COPY $s0 %1:fpr(s32) = G_INTRINSIC_TRUNC %0 $s0 = COPY %1(s32) RET_ReallyLR implicit $s0 ... --- name: test_f16.intrinsic_trunc alignment: 4 legalized: true regBankSelected: true tracksRegLiveness: true frameInfo: maxCallFrameSize: 0 machineFunctionInfo: {} body: | bb.0: liveins: $h0 ; CHECK-LABEL: name: test_f16.intrinsic_trunc ; CHECK: liveins: $h0 ; CHECK: [[COPY:%[0-9]+]]:fpr16 = COPY $h0 ; CHECK: [[FRINTZHr:%[0-9]+]]:fpr16 = nofpexcept FRINTZHr [[COPY]] ; CHECK: $h0 = COPY [[FRINTZHr]] ; CHECK: RET_ReallyLR implicit $h0 %0:fpr(s16) = COPY $h0 %1:fpr(s16) = G_INTRINSIC_TRUNC %0 $h0 = COPY %1(s16) RET_ReallyLR implicit $h0 ... --- name: test_v4f16.intrinsic_trunc alignment: 4 legalized: true regBankSelected: true tracksRegLiveness: true frameInfo: maxCallFrameSize: 0 machineFunctionInfo: {} body: | bb.0: liveins: $d0 ; CHECK-LABEL: name: test_v4f16.intrinsic_trunc ; CHECK: liveins: $d0 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0 ; CHECK: [[FRINTZv4f16_:%[0-9]+]]:fpr64 = nofpexcept FRINTZv4f16 [[COPY]] ; CHECK: $d0 = COPY [[FRINTZv4f16_]] ; CHECK: RET_ReallyLR implicit $d0 %0:fpr(<4 x s16>) = COPY $d0 %1:fpr(<4 x s16>) = G_INTRINSIC_TRUNC %0 $d0 = COPY %1(<4 x s16>) RET_ReallyLR implicit $d0 ... --- name: test_v8f16.intrinsic_trunc alignment: 4 legalized: true regBankSelected: true tracksRegLiveness: true frameInfo: maxCallFrameSize: 0 machineFunctionInfo: {} body: | bb.0: liveins: $q0 ; CHECK-LABEL: name: test_v8f16.intrinsic_trunc ; CHECK: liveins: $q0 ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0 ; CHECK: [[FRINTZv8f16_:%[0-9]+]]:fpr128 = nofpexcept FRINTZv8f16 [[COPY]] ; CHECK: $q0 = COPY [[FRINTZv8f16_]] ; CHECK: RET_ReallyLR implicit $q0 %0:fpr(<8 x s16>) = COPY $q0 %1:fpr(<8 x s16>) = G_INTRINSIC_TRUNC %0 $q0 = COPY %1(<8 x s16>) RET_ReallyLR implicit $q0 ... --- name: test_v2f32.intrinsic_trunc alignment: 4 legalized: true regBankSelected: true tracksRegLiveness: true frameInfo: maxCallFrameSize: 0 machineFunctionInfo: {} body: | bb.0: liveins: $d0 ; CHECK-LABEL: name: test_v2f32.intrinsic_trunc ; CHECK: liveins: $d0 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0 ; CHECK: [[FRINTZv2f32_:%[0-9]+]]:fpr64 = nofpexcept FRINTZv2f32 [[COPY]] ; CHECK: $d0 = COPY [[FRINTZv2f32_]] ; CHECK: RET_ReallyLR implicit $d0 %0:fpr(<2 x s32>) = COPY $d0 %1:fpr(<2 x s32>) = G_INTRINSIC_TRUNC %0 $d0 = COPY %1(<2 x s32>) RET_ReallyLR implicit $d0 ... --- name: test_v4f32.intrinsic_trunc alignment: 4 legalized: true regBankSelected: true tracksRegLiveness: true frameInfo: maxCallFrameSize: 0 machineFunctionInfo: {} body: | bb.0: liveins: $q0 ; CHECK-LABEL: name: test_v4f32.intrinsic_trunc ; CHECK: liveins: $q0 ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0 ; CHECK: [[FRINTZv4f32_:%[0-9]+]]:fpr128 = nofpexcept FRINTZv4f32 [[COPY]] ; CHECK: $q0 = COPY [[FRINTZv4f32_]] ; CHECK: RET_ReallyLR implicit $q0 %0:fpr(<4 x s32>) = COPY $q0 %1:fpr(<4 x s32>) = G_INTRINSIC_TRUNC %0 $q0 = COPY %1(<4 x s32>) RET_ReallyLR implicit $q0 ... --- name: test_v2f64.intrinsic_trunc alignment: 4 legalized: true regBankSelected: true tracksRegLiveness: true frameInfo: maxCallFrameSize: 0 machineFunctionInfo: {} body: | bb.0: liveins: $q0 ; CHECK-LABEL: name: test_v2f64.intrinsic_trunc ; CHECK: liveins: $q0 ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0 ; CHECK: [[FRINTZv2f64_:%[0-9]+]]:fpr128 = nofpexcept FRINTZv2f64 [[COPY]] ; CHECK: $q0 = COPY [[FRINTZv2f64_]] ; CHECK: RET_ReallyLR implicit $q0 %0:fpr(<2 x s64>) = COPY $q0 %1:fpr(<2 x s64>) = G_INTRINSIC_TRUNC %0 $q0 = COPY %1(<2 x s64>) RET_ReallyLR implicit $q0